Power switches are conventionally used to selectively couple a load with a supply voltage. In recent years, “smart” power switch devices have been developed which are equipped with one or more diagnostic abilities and protection features, for example against failure conditions such as overload and short circuit. For example, in such power switch devices a MOS power transistor may be used as switching element. The MOS power transistor may be operated in a defined state, e.g., high-resistivity state, in case of a failure condition.
Certain applications require driving higher loads and/or reducing power losses. To achieve such goals, it is possible to implement a plurality of MOS power transistors in the circuit and provide the circuit with the ability to support a parallel channel configuration: here, the load is connected in series to the plurality of MOS power transistors and the MOS power transistors are connected in parallel. In the parallel channel configuration, in the low-resistivity state of the power switch, the current through each MOS power transistor of the plurality of MOS power transistors is reduced; thereby, the overall current drawn by the load—corresponding to the sum of currents through the plurality of MOS power transistors—can be increased. A smaller current through an individual power transistor also reduces the dissipated power of that power transistor.
It has been observed that protecting the MOS power transistors against failure conditions can be difficult in such a parallel channel configuration.